well this board i will not be making. chalked time spent as my first learning experience. i'm already planning circuit without the timers. something like this but without the transistir.
What IC is IC1? If it is not an open collector output, it will not work properly.
could you draw an RC integrator and how it connects to opAmp/comparator? will this be one comparator per channel. again, using comparators here since i have a supply of them.
What comparator or op-amp do you have?
What you want is fast-attack slow-release on the output. That generally requires a method of creating a different charge and discharge rate in a capacitor, so it charges from one source impedance and discharges through a much different impedance.
The leading edge, upon trigger, needs to have a low impedance source or load (depending if the logic is going high or going low upon trigger). Then you want a much larger release impedance (going high or low) so the capacitor has a longer time constant on release.
The most economical way to do this is to plan the design so one component serves multiple purposes. For example modifying the circuit I posted earlier we could have something like this:
In this case C2 charges faster through R3. It discharges slower through R4. A very slight on-delay depending on the value of R3 and C2, and a MUCH longer off-delay that could be set by the value of R4 and C2.
Time constant is R*C or .01 seconds for attack and .1 seconds for release. The attack and release voltage threshold is 1.4 volts or so, and the peak charge voltage is around 12 volts or so.
This means the transistor comes on as it crosses 1.4 volts on the way up to 12 (fast) but turns off after the 12 volts discharges to way down from 12 to 1.4. LONG time.
At .1 seconds C4 would be 37% of 12 or 4.4 volts.
At .2 seconds it would be 37% of 4.4 or 1.6 volts.
Scaling C2 or R4 up would increase the time.
This is just a rough example to show how a fast attack slow decay would work, and not to be taken as a working system. The beta of Q4 and sink current on the collector would limit the upper size of R4, and I'm not going to spend time to do a total analysis of the system.
Tricks like this are used to reduce cost and complexity, because components can serve more than one dedicated function. There are probably a half-dozen ways to make the system fast attack and slow decay without adding more IC's.
It's almost certainly possible to loop around the comparator with an RC circuit to make a long delay on release without the darlington stuff and use smaller value caps, but I have to get back to work now.
Tom